Re: Some questions

[Mark Gonzales <markg@scic.intel.com>]

I don't know of any CPU-PCI bridge that will prefetch for a CPU read
from the PCI bus. Most CPU-PCI bridges can be configured to prefetch for
PCI bus master reads from cacheable system memory that lives on the CPU
bus.

This is why it is essential to implement bus mastering for good PCI bus
performance. Using CPU reads and writes to do I/O to PCI will give poor
performance for your device, and it will usually slow down any other bus
mastering PCI devices in the system.

--Mark 
not speaking for Intel.

"Kimmery, Clifford (FL51)" writes
>Does this mean that most CPU-PCI bridges do not attempt to prefetch
>unless the target address is known to be cacheable?
>
>An agent can be prefetchable (no read side-effects) without being
>cacheable (no potential for hidden changes).
>
>Cliff Kimmery
>Honeywell Inc.
>kimmery@space.honeywell.com
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