Re: interrupt latency...

["John R Pierce" <pierce@hogranch.com>]

> I'd like to know the exact way to calculate the interrupt latency
> in PCI bus. I understand, since the interrupt pins at the PCI connectors
> are shared, when there's an interrupt, the device driver has to read
> from the device's status register and check whether that device is the
> source of interrupt. If that device had not generated the interrupt, pass 
> control to the previous device driver. So while calculating the interrupt
> latency, am I right that one has to take into account all this PCI bus reads,
> compare and jump instructions (for the worst case)? Is there any typical
> interrupt latency period value for the PCI bus? Why I am asking this is
> I am planning to have a 8 DWORD FIFO in my PCI controller. So after 
> filling-up the FIFO, my on-board processor would generate an interrupt in 
> the PCI bus to tell the host to put my PCI controller in the initiator
> mode and do bus master xfer directly to the host memory. According to 
> my data xfer rates, my add-on processor may interrupt the host, some
> 4000 times in a second to transfer 8 DWORDS of data each time thru' the
> FIFO. So the total time wasted because of interrupt latency itself, in 
> a second, itself  will be 4000 times that of a single interrupt. Will 
> this create any problem with other PCI cards like graphics adapters,
> PCI-SCSI, or so.

Well, depending on your target operating system, this isn't going to work at
all.  Interrupt latency is generally more a function of the OS architecture and
the Wintel PC style of OS's just don't allow specifying this stuff very well. 
Also there are a lot of poorly designed devices in the PC world such as many
graphics adapters which can block the processor (by putting it in a wait state
during target disconnects) for milliseconds.

If your device is a bus master, why in the heck would it need the CPU's
attention for each short burst of 8 dwords???  By the time you handle a IRQ,
and setup a busmaster operation, you might as well have just read those 8
dwords directly...  Most bus masters should be able to transfer KILObytes
unattended otherwise there really isn't much point in them BEING a busmaster.

-jrp
›xe