Power sequencing (3.3 V/5 V)

[Pavel.Peleska@mch.scn.de]

Hallo PCIers,

the PCI 2.1 Spec. states at page 142, chap. 4.3.4.2. Power/Sequencing:

" There is no specified sequence in which the power rails are activated or 
deactivated. They may come up and down in any order......" 

I interpret this that there is basically no requirement concerning the 
sequence nor the time it can e.g. take to supply any one of the power 
voltages. For example the 3.3 V power source can supply its power after 1 
ms while it may take the 5 V power source e.g. 1 minute to power up. 
Especially if one power source never comes up, this may happen if separate 
DC/DC converters are used with one of them defective, supplying only one 
voltage complies to the PCI spec.

Unfortunately some SCSI and Ethernet devices that operate with 3 V PCI 
signaling but need 5 V for the core, require power sequencing with 5 V 
having to come up before the 3.3 V are up. Demage to the I/O buffers may be 
caused by not applying the power in the right order. Supposingly this 
requirement can always be fulfilled in the PC, but  causessubstantial 
problems in embedded systems. 

Question:
- Is it correct that devices that are PCI 2.1 compliant have to be power 
sequencing tolerant?

- Does this mean that devices that require power sequencing cannot claim to 
be 2.1 compliant?


Any comment appreciated,
Pavel Peleska      Tel:   ++49-89-722-41253
Siemens AG         Fax:   ++49-89-722-28502
SN EBG1            Email: Pavel.Peleska@mch.scn.de
Hofmannstr. 51
81359 Munich
Germany
¡