Re: Simulating/verifying PCI bidir requirements

[bradshaw@nlc.com (Lee Bradshaw)]

Hi Kevin,

You could try bus keepers (which generally exist on internal tristate
busses) in your testbench:

   buf (weak1, weak0) frame_hold  (frame, frame);

This buffer won't pull the signal high, but it should hold the last driven
state.  Depending on the timing between grants, this buffer can also
detect the input to the frame driver in your chip going low before the
output enable is turned off.  Pullups would normally mask this error as
well.


Kevin Normoyle wrote:
>
>
>1) Sustained Tri-State signals are driven (by you) high in the last cycle 
>you drive them.
>(this one is tricky, because if you put in a dumb pullup model, it will
>pull the undriven signal to 1 during the dead cycle, so your simulation
>might "pass")

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