Re[2]: PCI Trace Velocity

[Bruce Hanahan <bhanahan@ccmail.crosscomm.com>]

     The Motorola MECL book was suggested as a good reference on 
     transmission line theory.  I find a much more readable reference to be 
     Howard Johnson's "High-Speed Digital Design" from Prentice-Hall.  You 
     should be able to buy it in a technical book store.  I got my copy 
     from Computer Literacy in San Jose.  If not then contact the 
     publisher.
     
     I spent years trying to find good references on high speed design.  I 
     always found the Motorola book frustrating and confusing to read.  
     There are some industry high speed design experts who have stated that 
     the Motorola book has some inaccuracies, especially in the section 
     dealing with the affect of vias on high speed signals.  The Johnson 
     book does an excellent job describing the important issues, giving 
     quick and dirty explainations for those who just want a fast answer, 
     and providing the equations and physics for those (me included) who 
     want to understand the subject in more depth.  I also called Dr. 
     Johnson on a couple of occasions to ask more questions, and he was 
     friendly and accessable.    


______________________________ Reply Separator _________________________________
Subject: Re: PCI Trace Velocity
Author:  pci-sig-request@znyx.com at inet
Date:    12/26/96 5:31 PM


The correct formula for a microstrip's (i.e. a line on a board's 
external face) propagation velocity is:
     
       T (ns/feet) = 1.017 * sqrt(0.475 * Er + 0.67)
                                  -----
                                        not 0.457
for Er=4.7, T=144 ps/inch, still low.
     
BUT, more importantly, for traces between gnd/vcc planes, i.e. 
strip-lines, the formula is:
     
       T (ns/feet) = 1.017 * sqrt(Er)
     
for Er = 4.7, T = 184ns/inch, which is inside 150 to 190 ps/inch
     
I do not know why the propagation velocity is important. Even the delay 
seems quite robust.  I successfully operate PCI cards on an extender 
card with bus switches for "hot" insertion.
     
For boards we build, we do follow the rules for trace length, especially 
for the clock line.
     
A handy reference for transmission line theory is Motorola's "MECL 
SystemDesign Handbook".
     
     
Yoel lavian wrote:
>
> Hello PCI experts,
> The PCI specifications ver. 2.1 section 4.4.3.3. talk about the PCI trace 
impedance and velocity. It says " The trace velocity must be between 150ps/inch 
and 190 ps/inch".
> Talking to several PCB manufacturers, I understand that the parameter which 
effect the trance velocity is the material between layers, and the most popular 
is the epoxy glass.
> The equation for the trance velocity is:
> T (ns/feet) = 1.017 * square_root(0.457 * Er + 0.67) 
> Er - The material dielectric constant.
> For epoxy glass:  4.5 <= Er <= 4.9
> Even if we are taking the average value of Er = 4.7, then we have T= 1.7 
ns/feet --> 142 ps/inch. i.e. we are under the specifications limit.
> I will appreciate if somebody who faced this problem before can share his 
experience concerning this issue.
> Do I have to use some other material instead the epoxy glass ? Or maybe there 
is a mistake in my calculations ?
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