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Re: AMCC S5933 Matchmaker

Swenson, Jay wrote:
> 
> Hello all,
> 
> I'm sure this question has been addressed before but I'm new to this
> list. How  well does the AMCC S5933 Matchmaker chip work? What 
> shortcomings or complaints has anyone heard regarding this chip?
> 
> Thanks
> 
> Jay Swenson
> Bit3 Computer
> jays@bit3.com


Dear Jay,

I have designed several boards with the S5933Q. It works rather well,
but does have some quirks. I don't know how you intend to use it (ex.
FIFO, mailbox, passthru, PCI/addon initiated master mode, all of the
above, etc.) so I'll keep my comments general.

1) The clock output BPCLK, is not very robust. If you have several
loads, you will have to either buffer it (and incur a prop delay) or
buffer the PCI clock directly (in violation of the PCI standard).

2) Sync reads from the S5933Q's FIFO are difficult, since the read
signal is used to enable the DQ bus. In other words, you need super fast
control logic to get a signal round trip in 30ns (the FIFORD to the
5933Q and the data back to the addon ckt). I usually do sync writes and
async reads for this reason.

3) The FIFO doesn't have an almost full or almost empty flags, so it is
difficult (near impossible) to do I/O on every clock cycle. You do I/O
on one cycle and on the next cycle you check the FIFO flags.

4) The passthru timing diagrams in the S5933Q's data book have errors,
especially when in comes to ending burst transfers.

5) Use S5933QB version or later of the chip. Earlier versions don't do
burst transfers correctly on Intel Advanced EV motherboards.

I have talked to an engineer from AMCC who is designing the next major
rev of the chip (which doesn't look to be pin compatible but has many
better features), and told him of my wish list to fix these and other
problems. If you have further questions, please try to be as specific as
possible in your next post.

Regards,

Ken Crocker, Principal Engineer
Ken Crocker Consulting
(619) 457-0340 Voice, Voicemail, and Fax (autoswitch)
e-mail: kcrocker@kcconsulting.com
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