PCI Trend

[Benson Cheung <bcheung@Adobe.COM>]

Hi PCI Community,

We are designing a PCI-based 
compression/decompression ASIC
and are in the process of defining the
PCI feature set.

We have a requirement of 'high'
data through-put rate on the PCI 
bus, ranging from 50 - 100+ MBytes/sec.

In order to ensure that this chip
will fit well in the commerically 
available technologies (e.g. workstations,
chip sets, etc.) in the time frame of
introduction (~ mid '98), we would
like to get as much feed back from
the PCI community as possible to see what
roadmap of the PCI bus will
look like in this timeframe.

We have the following questions and
would love to get some feedback from you.

Thanks in advance for your help.

1)  Support for 64-bit PCI bus.
      (We know DEC makes 64-bit PCI-PCI
        bridge today.)

2)  66 MHz PCI bus.
      (Any 66 MHz PCI bus available now or in the future?)

3)  Is 5V-compliant important for
      a chip designed for 3V signaling
      environment?

4)  Support for 64-bit addressing.


- Ben Cheung -

_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/
  Benson Cheung           (bcheung@adobe.com)
  Adobe Systems Inc.
  Printing & Systems Division
  M/S  P05
  303 Almaden Blvd.
  San Jose, CA  95110-2702
  (408) 536-2872            (408) 537-8411  (FAX)
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@.