Re: PCI Clock Specs and PLL

["John R Pierce" <pierce@hogranch.com>]

> PCI clock specs allow changing (and stopping) 
> of PCI clock.  We are considering using the
> PCI clock to drive our ASIC (for synchronization
> benefits).  To control internal clock skew, we also 
> want to include an on-chip PLL.
> 
> But PLL won't work well with a reference clock
> that could be changing.  Does anyone have any
> good solutions for this problem?
> 
> Or is it the case that people are ignoring this specs
> and usually support only some fixed frequencies?
> 
> Since our application is not in the portable environment,
> is it safe to assume that stopping or changing the clock
> is not very common?  Who are doing this today in
> their systems?

This mail list went the rounds on this last summer(I think?).  Apparently you
can NOT use a PLL and expect to work on a range of desktop systems...  There
are even some folks using spread spectrum clocks to reduce RFI.  Newer desktop
systems support power management and could easily be slowing PCI clocks down in
'standby' type modes... etc etc etc...

-jrp
8'