Re: BURST Xactions CROSSING BAR BOUNDARIES

[Mark Gonzales <markg@scic.intel.com>]

If the target does not disconnect exactly at the boundary, it will 
claim data phases intended for some other pci target. This will 
result in data corruption, and a system crash. 

If a target is mapped to a range of addresses, it must claim 
addresses within that range, and ignore addresses outside that range.

I'm not sure why anyone would think that a computer system with 'fuzzy'
imprecise address decoding would ever work. Am I misunderstanding your
question?

--Mark
not speaking for Intel

kands@usa.net writes
>
>Hi,
>
>It is not very clear in the specs of PCI2.1 regarding the BURST Xactions
>Crossing BAR BOUNDARY.
>
> Let me be more exact on the problem. Suppose a Master Starts a Posted
>Memory Xaction close the BAR BOUNDARY and during the Xaction crosses the
>Boundary, Is it a must that the PCI target must issue a disconnect when
>the Master crosses the Boundary or is it O.K if the PCI target takes
>care by signalling to the application (the actual target where the write
>was targeted) that the Master has crossed the boundary, and leaving the
>responsiblity to the application to detect this condition and to issue
>a disconnect to the target which whill in turn be reflected to the PCI
>bus after say two clocks after the Master has crossed the BAR Boundary.
>
>If it is a must that the target has to disconnect exactly at the BAR
>Boundary, Pls. let me know where it has been specified in the specs.
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