[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: Another Burst Question
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Re: Another Burst Question
- From: khp@dolphinics.no (Kai Harrekilde-Petersen)
- Date: Tue, 28 Jan 1997 17:19:44 +0100 (MET)
- Cc: pci-sig@znyx.com (pci-sig)
- In-Reply-To: <32EE0EF8.19491176@aisinc.com> from Dave New at "Jan 28, 97 09:36:40 am"
- Resent-Date: Tue, 28 Jan 1997 17:19:44 +0100 (MET)
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"9K__L3.0.o2.ntYxo"@dart>
- Resent-Sender: pci-sig-request@znyx.com
Dave New writes:
> Now, *read* bursts are a different matter. Don't expect the host
> processor to be able to do read bursts from a slave device into
> host memory. This is a limitation of the currently available
> host bridge chipsets. You will need to have your device master
> the transfer, and do PCI writes through the host bridge to host
> memory, for bursting to occur.
I'm still to see a read prefetch burst from an Intel chipset.
Kai
--
Kai Harrekilde-Petersen <khp@dolphinics.no> #include <std/disclaimer.h>
http://www.dolphinics.no/~khp/ Linux: the choice of a GNU generation
"Argue for your limitations, and sure enough - they're yours" --Richard Bach.
: D 4