Re: PCI Clocks

[Ivor Bowden <ivor@peritek.com>]

At 06:43 PM 2/3/97 -0800, you wrote:
>Benson/Ivor,
>
>With reference to your email below, I have many major customers
>who are using a PLL-based zero delay buffer for PCI buffering. They
>are using 3.3V PLL-based zero delay buffers called the CY2305
>and CY2309.
>
>The PLL-based ZDB has a much faster tpd than FCT buffers
>and therefore, you get more margins on your clock timing,
>from what I understand from my customers. I am not aware of
>what they do to ensure that the clock path matches the data
>and control paths and whether that needs to be the case.
>
>Most of the PLL reference clocks in these cases are derived from
>a PLL-based motherboard clock generator like the CY2260. In this
>case, the reference  clock is usually not changing in the system,
>and when it does, the rate of change has to be slow enough that
>the zero delay buffer can track it.
>
>Modulating the clock to reduce EMI in your system will have
>the effect of increasing jitter. Therefore, you need to be careful
>in your system timing margin calculations, and account for
>this increased jitter.
>
>Hope this information helps..
>
>Piyush Sevalia
>Strategic Marketing Manager - Clocks
>pbs@cypress.com
>(408) 943-2786 (P)
>(408) 943-4897 (F)
>

Piyush,

 Thank you for the informative letter. I certainly agree with you that using
a "0 tpd" clock buffer can ease system design, and I know Cypress makes a
lot of really good parts. There is certainly nothing wrong with using a PLL
type clock buffer for PCI devices, _as long as you control the clock
source_. I'd guess your customers are using the buffer chips for motherboard
PCI devices, where they also control the main PCI clock. If you are making
PCI add in cards, on the other hand, you don't know what the clock might do.
It is allowed to change frequency, wobble, jitter, even stop. In this case
you can not use a PLL type of clock buffer, because it can not respond on a
edge by edge basis.
 Bottom line: you can not use a PLL type of clock buffer (such as the
Cypress CY7B9910 or the PLX EQ6600) as a PCI clock buffer on an add in PCI
board and be compliant with the PCI specification. In actuality, your board
would probably work in most systems today, but doing things with the clock
(either for EMI or power saving reasons) may become more common in the
future so it would probably be a good idea to be compliant. This issue was
discussed at length here in the past, and I believe that this was the
conclusion.

-Ivor

--------------------
standard disclaimer:
I speak for myself and my views may not be the same as my employer's.
Ivor Bowden
Peritek Corp
phone: (510) 531-6500
FAX: (510) 530-8563
email: ivor@peritek.com
hL: