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Re: TRDY# Hang...
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Re: TRDY# Hang...
- From: Ali Najafi <alinajafi@simei.aztech.com.sg>
- Date: Fri, 21 Feb 1997 15:47:04 +0800
- Resent-Date: Fri, 21 Feb 1997 15:47:04 +0800
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"ONogT3.0.b-5.-8L3p"@dart>
- Resent-Sender: pci-sig-request@znyx.com
>Gents,
>
>How should a system behave if ????
>-Frame# was asserted for a valid address
>-IRDY# asserted
>-DEVSEL# asserted
>-TRDY# never came down and the system hung.....
>Abnormalities in PCI targets are related to DEVSEL not responding but not
>TRDY#.
The target is supposed to complete the initial data phase of the transaction
within 16 clocks of assertion of FRAME# (PCI spec rev 2.1, page 248). This
would mean that the target should either perform a data transfer, or assert
stop (to retry, disconnect or abort the transaction). If your target does
not do so, it is not a 2.1 compliant device.
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