Approaches for PCI Overvoltage design using 3.3volt technology

[Alan Yee <alany@Aureal.com>]

The PCI specification requires an input to be able to handle a 11 volt   
overvoltage waveform in a 5 v signaling environment.  I've noticed that a   
number of manufacturers have developed PCI chips based on 3.3 volt   
technology that claim to have 5 volt tolerant inputs, while at the same   
time give absolute maximum ratings much less than 11 volts.

I was wondering how designers out there are handling this problem in 3.3   
volt technology designs.  Are you designing only for a 3.3 volt signaling   
environment?  Are you designing special I/O buffers which are actually 11   
volt tolerant?  Are you ignoring this part of the spec altogether?

If you are designing special I/O buffers what type of precautions are you   
taking to make sure that the 11 volt overvoltage waveform isn't a   
problem?

Thanks in advance.

Alan
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