RE: Approaches for PCI Overvoltage design using 3.3volt technology

[homann@erv.ericsson.se (Magnus Homann)]

> When you build 5V or 3.3V/5V PCI interface in a 3.3V technology the actual
> drivers work off the 3.3V rail which runs the core logic.  The diode clamps
> are to the PCI Vi/o bus.  This meets the PCI spec just fine, but you now need
> enough 3.3V core power pins to drive all the PCI outputs as well as 3.3V/5V or
> 5V PCI power pins to handle the switching transients.  This is a difficult
> concept for some customers to accept, eg, one 5V power pin isn't enough.  The
> drivers also must be 5V "tolerant".  This means the outputs do not have clamp
> diodes to the core 3.3V supply; only to the PCI Vi/o supply.
> 
> Ben Andresen 

The DEC 211152 PCI-bridge runs on 3.3V, and only has one(1) V(i/o) pin. I
don't understand how they can clamp to this volatge. As noted, the current
can be quite substantial. In the data sheet there is a note about a
"clamping circuit" connected to this single V(i/o) pin. I wonder how that
one works?

On another subject; has anyone build a motherboard and added discrete diodes
to the bus? As I understand it, they could  (in theory) be effective when
you have the host-pci bridge in one end, and a lot of empty slots in the
other. A couple (hundreds?) of BAV99 (probably faster needed) to reduce
over/undershoot when unpopulated?

War stories?

Homann
·¸§