RE: Approaches for PCI Overvoltage design using 3.3volt technology

[Andy Ingraham 25-Feb-1997 0753 <ingraham@wrksys.ENET.dec.com>]

homann@erv.ericsson.se (Magnus Homann) writes:

> The DEC 211152 PCI-bridge runs on 3.3V, and only has one(1) V(i/o) pin. I
> don't understand how they can clamp to this volatge. As noted, the current
> can be quite substantial. In the data sheet there is a note about a
> "clamping circuit" connected to this single V(i/o) pin. I wonder how that
> one works?

There are a few ways of doing "Universal" PCI _CHIPS_ using 3.3 V
technology.  (Note the distinction between chips and cards.)

One is to use I/O cells that run on 5 V power in a 5 V signaling
environment, and 3.3 V power in a 3.3 V signaling environment.  Thus,
in the 5 V signaling environment, only the core runs on 3.3 V.  The
I/O ring must use 5V technology.  The chip must have several V(i/o)
power pins, just like the PCI connector does.  Each I/O pad would have
a clamp to the V(i/o) pins.  With several such V(i/o) pins, there is
enough current available for all the I/O drivers, and the I/O clamps,
and the inductance is reduced so the clamps can be effective when the
whole bus overshoots at once.

Another way is to run the entire chip on 3.3 V, including the I/O
cells, but arrange it so that the clamping somehow changes between 5 V
and 3.3 V depending on which environment it is placed in.

In the case of the Digital Semiconductor (DEC) PCI chips, the single
vdd_clamp pin probably serves as a reference only, and doesn't conduct
the clamping current itself.  It "programs" the clamp circuitry to
know what the clamping voltage should be.

> On another subject; has anyone build a motherboard and added discrete diodes
> to the bus? As I understand it, they could  (in theory) be effective when
> you have the host-pci bridge in one end, and a lot of empty slots in the
> other. A couple (hundreds?) of BAV99 (probably faster needed) to reduce
> over/undershoot when unpopulated?

PCI busses can be difficult to tame, even when slots aren't empty
(remember that overshoot clamps are optional in the 5 V signaling
environment).  Clamp diodes added to the motherboard do help.

Diode arrays can be effective, if the common VDD and VSS inductance
isn't too large (watch what happens when all pins overshoot at once).

Regards,
Andy Ingraham
(speaking only for myself and not my employer)
¹È·