[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Verifying PCI64, Virtual Chips?
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Verifying PCI64, Virtual Chips?
- From: Rex Hill <rex@arl.wustl.edu>
- Date: Wed, 26 Feb 1997 08:56:11 -0600
- Resent-Date: Wed, 26 Feb 1997 08:56:11 -0600
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"T3cbg.0.8r6.Wz45p"@dart>
- Resent-Sender: pci-sig-request@znyx.com
We're developing a network interface ASIC that will
work on both 32 and 64 bit PCI, and we're looking
for ways to verify that the 64 bit PCI mode is working
correctly. We've built an FPGA for the 32 bit mode,
but we're considering the Virtual Chips PCI bus
test environment to verify the operation in 64 bit mode
(and perhaps exercise the 32 bit mode a little more).
Has anyone out there used the Virtual Chips environment
for PCI64? How about experiences with the VC env. for
PCI32? Any info would be greatly appreciated.
rex
rex@arl.wustl.edu
º P =