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BIST



I have a puzzler regarding the implementation of BIST in a PCI agent.  I
haven't found much in the archives regarding BIST.

The PCI 2.1 specification states (page 186) "A device's Configuration
Space must be accessible at all times, not just during system boot."  On
page 194, it says that BIST must be complete within 2 seconds (a
reasonable period).

The ASIC BIST cell that I am using disables functional operation of the
device during execution of the BIST.  For system reasons, I would like
to tristate all device outputs during BIST as well.

Is it a requirement that a PCI device implementing BIST remain
functional (at least to the extent of behaving as a configuration
target) while performing BIST?  Can it be non-functional for the two
second window?

Thanks in advance,

Cliff Kimmery
Honeywell Inc.
kimmery@space.honeywell.com
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