Re: BIST

["David O'Shea" <daveo@corollary.com>]

What is really at issue here is when will the system BIOS scan your
device, and what will it do if you don't respond because you are 
doing BIST.   This is a system BIOS implementation specific question
which requires a general answer for board implementors.

Currently, it is not an issue for other configuration software (like that
in an Operating System), because the actions of the BIOS usually take
longer than a few seconds, which is more than enough time for PCI boards
to become totally ready.

Most BIOS will not rescan looking for non-ready PCI devices after their
initial scan.  (In fact I don't know of any that rescan).  So, if your
device is not ready when the system BIOS is ready to look for it, your
device will be uninitialized by the system BIOS.  (No resource mappings,
no BAR's programmed, no option ROMS mapped).

So, the question is: when does a system BIOS do the device scan, i.e. how
long after reset is removed?   Most BIOS scan in a few passes, handling
certain devices earlier than others.  For instance, many BIOS like to find
the video device and turn it on as soon as possible.

Current BIOS are definitely approaching (and some have surpassed) the border
of scanning sooner than 2 seconds after reset has been removed.  Some BIOS
do their initial scan in fewer than 100 milliseconds after reset is removed.
[NOTE: This was covered in past discussions under the subject of how quickly
FPGA devices needed to download vendor ID's and subsystem ID's from serial
non-volatile stores for use in configuration cycle response.  You might 
try looking in the archives for FPGA, SUBSSYSTEM, or VENDOR ID, to hit 
uppon that material.]

Your question is essentially the same question as was raised during that
discussion, only you are talking about seconds.   The other issues was in
the millisecond range.   

Bottom line:  Your device will be skipped on some systems if you wait for
2 seconds to have your configuration registers come ready.  I would not do 
this.

At 03:56 PM 3/12/97 -0500, Kimmery, Clifford (FL51) wrote:
>The PCI 2.1 specification states (page 186) "A device's Configuration
>Space must be accessible at all times, not just during system boot."  On
>page 194, it says that BIST must be complete within 2 seconds (a
>reasonable period).
>
>The ASIC BIST cell that I am using disables functional operation of the
>device during execution of the BIST.  For system reasons, I would like
>to tristate all device outputs during BIST as well.
>
>Is it a requirement that a PCI device implementing BIST remain
>functional (at least to the extent of behaving as a configuration
>target) while performing BIST?  Can it be non-functional for the two
>second window?


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