Latency timer

[Rafi Boneh <rafib@gilat.com>]

Hi.

I am facing a problem of a very small bursts (3 Long Words each), when
trying to do memory writes from a DSP56301 as a master, to an IBM PC's
memory (not just a compatible but a real IBM...) as a target.
Using a PCI bus analyzer I discovered that My DSP56301 deasserts   REQ
at the same clock FRAME is asserted (which is  allowed by the PCI spec,
for a device that only wants to do a single transaction).
The host arbiter removes GNT one clock after that, although the bus is
not in Idle state. This is not recommended by the spec, but not
forbidden ither. In addition, the Latency timer in the configuration
space is set to 0. This all lead to a very short transaction.

My questions are:
1 )  who is responsible for setting the Latency timer? Is it the BIOS,
or the O.S. (Windows NT in my case).
2 )  Is it allowed for the device driver, or the device firmware, to
increase the Latency timer setting above the reset requirement which is
0?

Thanks.
Rafi Boneh.
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