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Re: Latency timer
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Re: Latency timer
- From: "David O'Shea" <daveo@corollary.com>
- Date: Tue, 25 Mar 1997 19:22:49 GMT
- Old-Return-Path: <daveo@corollary.com>
- Resent-Date: Tue, 25 Mar 1997 19:22:49 GMT
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"zSqno1.0.hp5.GP7Ep"@dart>
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This BIOS sets (is supposed to set) the latency timer values.
The operating system is free to reset the timer values, although
most do not. It is generally considered bad form to reset your
own Latency timer value from within a device driver because the
device driver does not have the "big" picture.
Enter the real world. Most BIOS employ a simple scheme of setting
all of the latency timer registers to the same value. Some "fancy"
schemes allow the user to control the values on a slot by slot basis.
Still others let specific slots be control from BIOS setup, and have
a single setting for "all the other slots". Even these later
mechanisms which are still fairly simplistic are extremely rare.
The most common PC system approach is to just set all the latency
timers to the same value.
The reason for this crappy scheme is that its hard to come up with a
good scheme, and most OEM's do not put that much effort into their BIOS.
Some OEM's also feel that allowing the latency timer values to be
exposed just allows uneducated end users to really mess with the machine
which just causes support nightmares. Since the vast majority of
end users are not PCI experts, most do not know how the latency timer
values work. Its like handing a loaded gun to a child.
The OS do not usually mess with latency timers because again, there is
no really good general scheme to employ to achieve a well tuned system
on all systems. OS have these same tuning problems with other aspects
of performance tuning as well.
So, if you want to change the latency timer value, there is really no
one to stop you, or much of a reason to shy away from the practice.
It does not seem like you would do much worse than the most common scheme
of setting every device zero. I might suggest that if you find the value
set to a non-zero value, you leave it alone. This implies that the
BIOS did *something* to set the values, and you may not know better.
If you find it set to zero, then have your driver change it to something
more reasonable. When it's nonzero - the BIOS probably just employed a
poor cheazy, set everyone the same mechanism, but its better than nothing.
Alas, you can employ the technique that the "better" BIOS employ, of
have a user settable field in the Registry that controls whether the
driver will reset the value, and to what. (The what should probably
be preset by you). This just takes the tack of moving the problem
back onto the uneducated end user.
There really is no good solution until people (BIOS writers or OS writers)
put significant effort into coming up with latency tuning schemes.
The best would be for the OS to do it based on some general principle
choosen by the end user like:
Tune for Disk Performance.
Tune for Internet Performance.
Mixed Disk/Internet Performance.
Server Load/Client Load.
Do Not Retune PCI Performance Characteristics (use BIOS tuning).
Although still crude, this type of guideline would allow the OS to then
proceed to set latency values based on device type, skewed to better
some specific classes of device. Windows NT already asks such questions
in order to tune other system characteristics, but the values are not
used for setting PCI latency timers.
We probably won't see this for a long time (if ever).
Regards,
David O'Shea
daveo@corollary.com
At 09:56 AM 3/25/97 -0500, Rafi Boneh wrote:
>Hi.
>
>I am facing a problem of a very small bursts (3 Long Words each), when
>trying to do memory writes from a DSP56301 as a master, to an IBM PC's
>memory (not just a compatible but a real IBM...) as a target.
>Using a PCI bus analyzer I discovered that My DSP56301 deasserts REQ
>at the same clock FRAME is asserted (which is allowed by the PCI spec,
>for a device that only wants to do a single transaction).
>The host arbiter removes GNT one clock after that, although the bus is
>not in Idle state. This is not recommended by the spec, but not
>forbidden ither. In addition, the Latency timer in the configuration
>space is set to 0. This all lead to a very short transaction.
>
>My questions are:
>1 ) who is responsible for setting the Latency timer? Is it the BIOS,
>or the O.S. (Windows NT in my case).
>2 ) Is it allowed for the device driver, or the device firmware, to
>increase the Latency timer setting above the reset requirement which is
>0?
>
>Thanks.
>Rafi Boneh.
>
>
ü P =