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Request/Grant Tuning
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Request/Grant Tuning
- From: pavel.peleska@oen.siemens.de
- Date: 15 APR 97 13:46:34 MEZ
- Resent-Date: 15 APR 97 13:46:34 MEZ
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"geRn9.0.Q61.34tKp"@dart>
- Resent-Sender: pci-sig-request@znyx.com
Hallo PCIers,
in chapter 3.4.1. the PCI Spec states "..one GNT# can be deasserted
conincident with another GNT# being asserted if the bus is not in the Idle
State. Otherwise, a one clock delay is required between the deassertion of
a GNT# and the assertion of another GNT#, or else there may be contention
on the AD lines ...
...due to the master doing address stepping."
============================================
Is the arbiter allowed to deasserted one GNT# conincident with asserting
another GNT# if the bus is in the Idle state if it is known that no device
in the system is using address stepping?
Are there any devices -not using address stepping- that may get confused if
the arbiter does not insert one clock delay between deassertion of one GNT#
and the assertion of another GNT# if the bus is in the Idle state?
Any comments appreciated,
-------------------------------------------------
Pavel Peleska Tel: ++49 89 722-41253
Siemens AG Fax: ++49 89 722-28502
SN EBG 11
Hofmannstr. 51
81359 Munich Pavel.Peleska@oen.siemens.de
Germany
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