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Re: Address decoding
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Re: Address decoding
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- Date: Tue, 15 Apr 1997 14:11:21 -0600
- In-Reply-To: Mr Steve Joures <sjoures@saiman.demon.co.uk> "Address decoding" (Apr 15, 6:48pm)
- References: <861126661.1117520.0@saiman.demon.co.uk>
- Resent-Date: Tue, 15 Apr 1997 14:11:21 -0600
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"3GYIa.0.T_.p4-Kp"@dart>
- Resent-Sender: pci-sig-request@znyx.com
On Apr 15, 6:48pm, Mr Steve Joures wrote:
> Subject: Address decoding
> I'm reading a book on the PCI specifications at the moment and it states
> that all PCI address bits must be decoded. I'm designing a circuit behind a
> bridge chip with a small address space and intend to request a small range
> in the bridge configuration registers. I assume, in this case, I only need
> to decode the lower order address lines. Am I right ?
I think you might be confused by the word "decode". What the PCI spec says
is that to determine whether a particular address is intended for your
card, you should make sure that you compare all bits to what is written in
your BAR. (Of course, the lower order ones would be excluded from that.
The point was that you shouldn't ignore some of the upper order bits like
some ISA cards did.)
You are probably thinking that you need to decode the lower address bits to
figure out which particular register within your card is addressed. It is
true that that decoder only needs to look at the lower order address lines.
In summary, you should design your device so that you never respond to
addresses outside the range allocated to your card. That is what the spec
means when it says all bits must be decoded.
> TIA
>
> Steve Joures
Monish Shah
Hewlett Packard
. 4 "