3v3 signaling, noise margin and universal card.

[basset@csti.fr (Thierry Basset)]

Hi PCI experts,

i'm currently designing an 155 Mbit/s ATM PCI board.
I am wondering if i can design an universal board ?

I will use a proprietary 3V3 asic with 5V tolerant io for 
the PCI interface.

With this component, i can work in 5V signaling without
problem. 

If i want to use my asic in a 3v3 signaling environment,
according to my signal integrity expert, i'm required
to supply my component with the 3v3 PCI rail.
	He says so, because the noise margin will be
reduced if two 3v3 signaling components are not supplied
with the same 3v3 power. (on page 128 of the 2.1 PCI spec.
i can effectively read that Vih is not an absolute value,
it's 50% of Vcc.)

If he is rigth, i am required to supply my asic with the
3V3 PCI rail. It's not possible for me: 5V motherboard 
are not required to supply 3v3.

So, i cannot design an universal board.

I will design:
1) first a 5V signaling board (with an on board regulator to 
supply my 3v3 components.)
2) later a 3v3 signaling board (with my PCI interface asic
supplied by the 3v3 PCI power rail).


Any comments would be appreciated,

thanks in advance.

			Thierry Basset


******************************************************************
Thierry BASSET 	
Board Designer - Hardware Engineer
Compagnie des Signaux Technologies Informatiques.

CSTI 		
1, bd Marius Vivier Merle
69443 Lyon cedex 03 - FRANCE

Tel: (33) 4 7235 8479
Fax: (33) 4 7235 8425
email: basset@csti.fr
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