RE: Strange failure with PLX9060ES

[Adam Barnes <amb@transtech.co.uk>]

Hi all,

With reference to David Griffin's problem (original message appended) :

I think you're hitting a problem with the Triton 430FX chipset associated with peer-to-peer DMA. The chipset's arbiter locks up in various circumstances when you attempt this; I saw this a year or so ago using a PLX PCI9060 (not ES) to write directly to a DCI display, and posted a question at that time, which got me a response that suggested that the old hands on this mailing list are well aware of this problem. Note that DMA to/from host memory is fine so your SCSI card or whatever will work OK.

It would appear that when Intel's marketing people invented the phrase "concurrent PCI" to describe the capabilities of their newer PCIsets they actually meant "PCI which works".

Adam Barnes
Transtech Parallel Systems


-----Original Message-----
From:	David Griffin [SMTP:daveg@highwater.co.uk]
Sent:	12 May 1997 10:51
To:	Mailing List Recipients
Subject:	Strange failure with PLX9060ES

Hi all,

this is my first posting to this group, so please bear with me if I'm off
track.

We have a range of PCI cards which are based around the PLX9060/9060ES
bridging devices. Our cards are Bus Master devices which DMA (using our own
DMA controller in QuickLogic) from Host Memory to FIFO devices on the card.
We are therefore using the PLX chip in the Direct Master Read mode. The
local bus side of our interfaces is significantly slower than the PCI side
and we therefore suffer problems with the various errata surrounding this
configuration.
Until recently we believed that we had stabilised on a configuration that
worked well. These cards have been shipping in large numbers for over 12
months.

Currently we are using the 9060ES Rev1 device and have found that in one
particular system (Intel Motherboard, Intel PCISet SB82437FX66, Intel
PCISet SB82371FB) our cards have severe problems transferring data.

We have analysed the problem on the PCI bus using a HP1661C analyser and
PI-PCI32 Preprocessor pod. The evidence is clear, we can see a sequence of
burst transfers occuring as normal, then for no apperent reason when we
(i.e. our custom DMA controller) begin our next burst, we ask the PLX for
the data (by asserting the ADS signal) and it NEVER asserts the REQ signal
to ask the motherboard for the data.

We are aware of the various errata on the 9060ES and it's predecessors and
are 100% confident that we are not hitting any of them.

Has anyone else had experience with PLX devices ?
Anyone aware of any problems with the Intel Chipset mentioned above ?
Suggestions ?

Thanks in advance

Dave Griffin

(I can provide analyser traces, should anyone be interested).


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