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Re: Series Termination
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Re: Series Termination
- From: "Bender, Bernhard" <br@elsa.de>
- Date: Wed, 14 May 97 9:39:10 -0400
- In-Reply-To: <E7A77933019C1400>
- Organization: ELSA GmbH
- Resent-Date: Wed, 14 May 97 9:39:10 -0400
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"k6pR01.0.My4.jrMUp"@dart>
- Resent-Sender: pci-sig-request@znyx.com
- Sender: "Bender, Bernhard" <br@elsa.de>
Hi,
the PCI spec is adamant about this:
You MUST NOT add any other components to the PCI signals besides the
(single!) load of you chip. Also, the characteristics of the input
and output drivers are defined quite precisely.
So, you should see to get an FPGA (or other) which supports PCI
compliant I/O cells. Forget about any discreet components.
PCI has been designed to work without series termination etc.
Regards
Bernhard Bender
---
Group Manager Core Technology ELSA Computer Graphics
ELSA GmbH Email: br@elsa.de
Sonnenweg 11 Fax : +49 (241) 606 2099
D-52 070 Aachen, Germany WWW : http://www.elsa.de
*** Original Message Follows ***
A recent class that I took specifically discussed connecting series
terminating resistors of approx. 30ohms to all PCI outputs being
driven
onto the bus. However, I did not find anything regarding the use of
series termination in the PCI Spec. My target will be an Altera FPGA
connecting to an SGI O2. What elements should be used to connect to
a
33MHz 32-bit PCI bus in order to maintain a clean signal? What about
bidirectional lines--do they get series termination as well?
*** End of Original Message ***
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