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Re: Memory prefetch

On Fri, 30 May 1997, John R Pierce wrote:

> > > Could it be your device isn't handling some sort of host abort-retry
> condition
> > > correctly and mistakenly advancing the FIFO on a aborted xfer?
> > >
> > 
> > I don't see anything to indicate that an abort, retry or error occurs with
> > the transfer.
> Hmm.  Are these problems specific to any particular CPU and/or host bridge
> combo?  I was hearing the hardware guys on one project complaining about write
> merges on P6 and P-II's messing them up on a non-cachable/non-prefetchable
> coprocessor.

The machine I'm testing with has a P5 and we see the same opreation on two
boxes, but I'll look into it.

> -jrp