PCI bus simulation/modelling

[Alistair Jackson <alistair@oxsemi.com>]

My company is currently performing feasability studies for a number of
PCI related ASIC development projects. As part of this process I need to
determine the level of support available in the public domain or from
other (internet?) sources. We prefer to do our development in VHDL but
we are capable of using C or Verilog models if appropriate.

Something of particular interest to us is a PCI-bus simulation
environment, based on the VHDL test-bench approach (or similar). We
would use this to simulate and verify our PCI-bus target designs. 

If anyone has heard of such a thing, I would be grateful if you would
let me know.

~~~~~~~~~~~~~~~~
Alistair
Jackson
¥4!