Re: Memory prefetch

[Dave New <den@aisinc.com>]

NCI GmbH wrote:
> 
> Standard PC boards cannot initiate burst transfers on the PCI bus.
> Burst transfers can only be initiated by cards which support bus
> mastering, not by the host processor. The "movsd"-instruction will
> generate multiple 1-dword accesses to the selected PCI device.
> 
My experience has been that *write* bursts initiated by the host
processor to a PCI target is supported on most modern PC host
chipsets (as long as the target can take it in burst-size gulps 8-).

In this case, a 'rep movsd' will indeed cause a burst, as long as
you are writing, rather than reading from the PCI bus.  As a
matter of interest, the Natoma (200MHz PentiumPro) chipset seems
to be capable of arbitrarily long write bursts, which can play
havoc with targets that may be counting on doing somthing else
between bursts (like storing some of that data away, or doing
some processing on it 8-).

If you want to burst data *to* the host memory, then you will almost
certainly need to initiate the transfer from another PCI agent,
rather than the host CPU.

Also, bursting data *from* the host memory *to* a PCI initiater is
generally not supported by most host chipsets.  Intel cites
host memory cache coherency complications as the reason for
not supporting this.  That's a real limitation, in my opinion,
since you must use the host processor to manually move the data
from host memory to a PCI target, thus consuming the host CPU
100% during the transfer, or else move it piece-wise across
the PCI bus, tying up the bus with 4 to 5 PCI bus clock cycles for
every datum (byte, short, long) transferred (*that* will chop
your 132 MByte/sec peak transfer rate down to size 8-).

Most (all?) PC chipsets do not contain a DMA controller in the
host bridge (the PC 'legacy' DMA controller is in the PCI-ISA bridge
and cannot handle PCI-PCI transfers). 8-(

I'd rather have the data source be the initiator, in most cases
(when handling real-time data), so in order of preference, I'd
like to see DMA controllers put in the host bridges, before
support for burst reads from the PCI bus.  Of course, for
device-centric situations (hard disk controller, etc), it would
be nice if the PCI agent could master both read and write bursts
from/to the host memory, possibly making the device driver a little
easier to write, since it wouldn't have to compete with other
drivers to use a shared host-bridge-resident DMA resource.

Cheers,

-- DaveN
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
Dave New, den@aisinc.com    | Machine vision?
Applied Intelligent Systems |      I'm glad *they* can see the future...
3980 Ranchero Drive         | 
Ann Arbor, MI  48108        |        Opinions expressed are mine.    | PGP 2.6
(313) 332-7010              | 08 12 9F AF 5B 3E B2 9B  6F DC 66 5A 41 0B AB 29
(313) 332-7077 FAX
¨¤”