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Re: Memory prefetch
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Re: Memory prefetch
- From: Kevin.Normoyle@Eng.Sun.COM (Kevin Normoyle)
- Date: Sat, 7 Jun 1997 15:26:05 -0700
- Resent-Date: Sat, 7 Jun 1997 15:26:05 -0700
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"MO87Q1.0.Xq.Q4Ucp"@dart>
- Resent-Sender: pci-sig-request@znyx.com
> How do SMP chip sets handle the case where one CPU is bursting
> data and another CPU needs to fetch instructions?
Design bus protocols that include fairness and guarantees of forward
progress. Implement those protocols everywhere.
PCI is not such a beast.
A lot of "PCI issues" really is a result of having the wrong kind of glue.
-kevin
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