Re[2]: PCI Signal Loading

["Kim Olsen" <kolsen@acdnj.itt.com>]

     Andy,
     
     The way I understand the loading problem is that the capacitance of 
     the finger connectors on the card edge is high enough to generate 
     another capacitive load.  By my understanding, and this was mentioned 
     specifically at the PCI Plus technical seminar last spring, it is this 
     that adds the load, since it is the capacitive not resistive load that 
     causes the problems.
     
     Since the compact PCI uses a pin connector, the capacitance imparted 
     is less.  I have not looked into the capacitance of the finger 
     connectors, since that is not part of my end product, but the 
     capacitance in a pin connector is usually in the area of 1pF or 2pF, 
     which is 1/10 the typical capacitance of a semiconductor input.  This 
     is part of what allows CPCI to have upto 8 slots on a backplane 
     without a bridge.  That along with a specific 65 ohm trace impedance 
     vs. 50 - 100 ohm range for standard PCI are the main differences in 
     the two formats.
     
     
     Correct me if I'm wrong.
     
     Kim


______________________________ Reply Separator _________________________________
Subject: RE: PCI Signal Loading
Author:  pci-sig-request@znyx.com at ccminet
Date:    2/6/98 11:05 AM


I'd be cautious about this.
     
While most PCI output drivers may be able to support 10 loads, the REQ# 
and GNT# drivers can be half-strength (see NOTE 1 below Tables 4-2 and 
4-4 in sections 4.2.1.2 and 4.2.2.2, in the Spec).
     
Furthermore, the timing of point-to-point signals is much different than 
that of bussed signals.  See Tval(ptp) and Tsu(ptp) in Table 4-6, 
section 4.2.3.2.  For a 33 MHz PCI bus, that leaves only 4 ns for REQ# 
interconnect delay, versus 10 ns for bussed signals.  The Spec has taken 
advantage of the fact that non-bussed signals switch and settle faster.
     
Turning REQ# into a bussed signal has some risk.  However, adding a load 
on the same card, electrically close to the source, isn't as bad as 
being on two separate cards with two connectors and stubs.
     
(By the way, regarding the connector as a load ...  It's not the 
connector itself, it's the stub of the connector and 1.5" long trace, on 
bussed signals, that makes us treat add-in cards as two electrical 
loads.  REQ# normally drives just one electrical load, the host 
chipset.)
     
Regards,
Andy Ingraham
     

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Subject: RE: PCI Signal Loading
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