Re: Help on MWI rule

[Joe Cowan <jpc@hpmckee.fc.hp.com>]

Responding to Tai Phan:

> Greetings,
> 
> I need opinions from PCI experts on the MWI command.

Here are my personal opinions.

> The situation is like this: 
> 
> The master has a block of data that fits into 4 cachelines. 
> The master issues a MWI, intending to transfer all 4 cachelines in one
> transcation.
> 
> Case 1:
> Slave disconnect in the middle of the first cacheline.
> 
> Case 2:
> Slave disconnect at the cacheline 1.
> 
> My questions are:
> 
> In case 1, should I expect the master to come back with MW to finish up
> the first caheline, then come back in again with MWI for the remaining
> three cachelines, or does the master come back with MW to finish up the first
> cacheline, and continue the remaining three on the same transaction?

It depends upon which host bridges you want to optimize your card for.
Some host bridges are highly dependent upon MWI in order to achieve
maximum inbound DMA bandwidth.  With other host bridges, MWI doesn't
make much of a difference, so completing the operation with a single MW
transaction is more efficient than splitting it into separate MW and MWI
transactions.

On the other hand, if your card is likely to terminate its own
transactions prematurely very often due to master latency timer
expiration, it's nice to use MWI as much as possible, so you can defer
termination to the next cacheline boundary each time.  This will likely
be beneficial for most host bridges.

It's probably safest to provide a configurable option if you can.

> In case 2, should I expect the master to come back with MWI for the 
> remaining cachelines, or with MW?

I would hope the master could use MWI for the remaining cachelines.

> I know either case would be legal, but I want to what you would do if
> you are designing the master.
> 
> Thanks,
> ----------------------
> Tai Phan				Interphase Corporation
> phan@iphase.com                         http://www.iphase.com

Joe Cowan

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