DEC PCI/PCI Bridge (21152) - Memory Read Multiple Problem

[Gabe Fitch <GFITCH@BARRSYS.COM>]

Greetings,

I have a communications PCI adapter that works fine on the
primary PCI bus (upstream the bridge), but fails on the secondary
(downstream from the bridge) while doing a Memory Read Multiple
transaction. 

Looking at LSA trace of the bus shows the Bridge first asserting
stop several times (prefetching data), then asserting trdy (irdy
asserted also
and therefore a valid transfer, once the rising clock comes, in my
adapters' mind), 
and then at the rising edge of the clock, asserting stop simultaneously.

Is the stop (retry) coming too late?

Eventually, the Bridge seems to get upset and never asserts trdy.

Has anyone else had a similar problem with this PCI/PCI Bridge?

Any feedback would be appretiated.

Gabe Fitch
H/W Engineer
Barr Systems, Inc.