Re: [Fwd: PCI Reset Question]

[Boaz Shahar <boaz@msil.sps.mot.com>]

Hi,
5 clocks until first access (You can reply by Retry) and 2**25 cycles
until you have to responed with data.
Boaz
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> Date: Mon, 23 Feb 1998 16:21:48 -0600
> From: garyk@xactinc.com (Gary Kidwell)
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> On the PCI bus, do you know how much time is spec'd from the time
> reset (PRST#) is deasserted until configuration cycles are started or
> are permitted?
> 
> I can't seem to find it in the PCI Local Bus revision 2.1 spec.  
> 
> Best Regards,
> Joe
> 
> Joe Fockler
> Texas Instruments
> PCIbus Solutions Applications
> 8505 Forest Lane, MS 8709
> Dallas, TX 75243
> (972) 480-6064 phone
> (972) 480-6400 fax
> jfockler@ti.com
> http://www.ti.com/sc/pci
> 
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> From: Joe Fockler <jfockler@ti.com>
> Subject: PCI Reset Question
> Date: Mon, 23 Feb 1998 16:01:31 -0800
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> 
> Hey Gary,
> 
> On the PCI bus, do you know how much time is spec'd from the time
> reset (PRST#) is deasserted until configuration cycles are started or
> are permitted?
> 
> I can't seem to find it in the PCI Local Bus revision 2.1 spec.  Do
> you have a contact name/email or phone that might know the answer?
> 
> Best Regards,
> Joe
> 
> Joe Fockler
> Texas Instruments
> PCIbus Solutions Applications
> 8505 Forest Lane, MS 8709
> Dallas, TX 75243
> (972) 480-6064 phone
> (972) 480-6400 fax
> 
> jfockler@ti.com
> 
> http://www.ti.com/sc/pci
> 
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>