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pci spec question
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: pci spec question
- From: Jim Goss <ra6596@email.sps.mot.com>
- Date: Fri, 27 Feb 1998 06:54:05 -0500
- Cc: SIG PCI <pci-sig@znyx.com>
- Organization: Motorola, SPS, NCSG, CTASD
- References: <199802241631.AA031887913@txbc.sps.mot.com>
- Reply-To: RA6596@email.sps.mot.com
- Resent-Date: Fri, 27 Feb 1998 05:03:10 -0800
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-ID: <"2mpfZ1.0.486.KRhzq"@electra.znyx.com>
- Resent-Sender: pci-sig-request@znyx.com
I have the following question about pci spec.2.1.
In section 3.2.4 of pci spec2.1, the following is specified:
"All AD lines must be driven to stable value during 64-bit transfers
every address and data phase."
But in the following sections about "Transaction Termination",
the spec. did not mention anything about stable data during the
termination period. Is it required that the corresponding party
(slave or master) must keep the data stable during the whole
termination period? One example is: when a slave signals the retry
it may not put any data on the data bus. Is the slave still responsible
to put a stable data on the bus during the retry data phase?