Re: PCI latency and VGA drivers

[Kevin.Normoyle@Eng.Sun.COM (Kevin Normoyle)]

I just have a small amount of experience with this retry/graphics command fifo
business. But I noticed that having a retry counter in the core logic chipset, 
that can cause an error interrupt when a limit is exceeded, is useful
for helping the graphics driver writer debug his code.

It turns out that some drivers do try to track the command fifo entries
perfectly, but since PCI has a mechanism for backing off (ungracefully, 
with retries), sometimes they just don't know where in their code they've
lost track of the available entries. (i.e. nothing "fails")

It would have been better to have an agreed on limit to number of retries, 
that hardware everywhere could trap on.

Basically, every chipset that seems to implement retry limit counters has
to disable them when they finally ship. (Because no limit is workable, for
the code that's out there).

So I think PCI dug its own hole here. (by not being heavy-handed up 
front with retry-limit detection)

-kevin

> For those who are interested in the real time performance of
> PCI, here is an interesting tit-bit.

> In my experience of testing popular PC based PCI systems,
> one of the main culprits in long bus access latencies is
> the reliance of video drivers on the PCI retry mechanism
> to cope with command/data fifo full states in the PCI
> VGA chipsets. (See John R Pierce's reply to Brian Sassone
> on 15 Oct 1996, "Re: Problem w/ Matrox Millenium")

> Given that fallout from this problem seems to be felt
> fairly widely amongst audio card users, I'm a little
> surprised that someone with some weight to throw around,
> and a stake in their systems working properly (like
> Microsoft or Intel ?) hasn't kicked the graphics driver
> writers into line.
> 
> Graeme Gill.
> 
>