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Bus parking protocols for Intel bridge chip sets
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Bus parking protocols for Intel bridge chip sets
- From: Mark Valley <mark.valley@analog.com>
- Date: Fri, 1 May 1998 16:07:06 -0400 (EDT)
- Resent-Date: Fri, 1 May 1998 14:36:17 -0700
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-ID: <"Vxp0S2.0.7X7.BjYIr"@electra.znyx.com>
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Greetings!
I'm trying to determine the bus parking protocols for the following
Intel bridge chip sets:
430TX
440FX,LX,EX,BX
450GX,KX
I've looked at some of the data sheets on the Intel web site. They don't
even refer to bus parking, much less explain how it is done.
Any pointers to information on these chip sets would be appreciated.
Thanks!
-Mark
========================================================================
Mark Valley Analog Devices, Inc.
mark.valley@analog.com Three Technology Way
Phone: 781 461 3413 Norwood, MA 02062-9106 USA