Good design recognition

["Philip Ronzone" <Philip.Ronzone@eng.efi.com>]

  > Date: Thu, 30 Apr 1998 23:05:33 -0700
  > From: Jochen Roth <jochen@znyx.com>
  > Subject: Re: Big and little endian issue
  > 
  > At 10:14 AM 4/28/98 -0700, Philip Ronzone wrote:
  > >
  > >Because people designing bridges do not do very good designs.
  > >
  > 
  > Aside from throwing out features you see no use for -- can you think
  > of some you would add to make the first ever 'very good' bridge?

Well, I'm not an aerospace engineer either. But if I see the airplanes
keep falling from the sky, I *am* qualified to say that the design
has some obvious deficiencies.

Which, BTW, the "not good designs" is in the context of BE/LE issues.

But, rather than leave you with no example, a company that will remain
nameless built a mutli-function chip, that among other things had
a PCI-to-ISA bridge.

After much sweating and bug-hunting, I discovered that this bridge
did not allow I/O port accesses through to the ISA bus while any
PCI bus mastering operations from the ISA bus were going on!

Actually, it wasn't a case of not allowing - if it happened the whole
device went crazy and crashed.

The chip designers ACTUALLY asked why it was a problem! They said I
should just not do any ISA I/O port operations while any DMA/bus-mastering
was going on!!!

So while this chip was "good" in the sense it had a lot of functions
crammed into it and was relatively cheap (etc. ...), it was NOT a good
design from a software use-ability standpoint.




Reminds me of design status of the eventual Trey-1 jet engine, an engine
designed to meet the need for very high thrust decades ago:

"... So when we said that no matter what the cost, and whatever the
 weight, it would set out to build the highest thrust jet engine ever made,
 I am pleased to announce we've met the cost and weight goals ..."



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Philip K. Ronzone (RON-zone), extension 8300 ..................................
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