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Re: BAR value of zero?
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Re: BAR value of zero?
- From: Richard Walter <rwalter@corp.auspex.com>
- Date: Wed, 27 May 1998 09:44:47 -0700 (PDT)
- Resent-Date: Thu, 28 May 1998 03:29:15 -0700
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-ID: <"ZynUo2.0.Bh6.FD4Rr"@electra.znyx.com>
- Resent-Sender: pci-sig-request@znyx.com
>
> Hi,
>
> In section 3.2.2, Addressing, of the PCI spec 2.1 there is a brief
> mention of a base address register value of zero being invalid (the
> comment is in the implementation note on Device Address Space). Is
> there any more information on this subject in the spec? How is a PCI
> core supposed to respond if it is assigned a base address value of zero?
>
You are correct. The 2.1 spec is vague. This issue has been discussed
before in the pci-sig mailing list, so you might want to look back through
the archives.
My personal opinion is that 0 should be a perfectly valid value for a
BAR. Since PCI was intended to be non-processor specific (yes, I know
that 99+% of PCI buses are with Intel CPUs), there is no reason why a
device could not be configed to sit at the very bottom of memory space.
However, I also understand why some people would want a special BAR value
to disable a specific BAR to accomplish partial configuration. (I don't
happen to agree with it, but I understand it.) And, for Intel architecture
machines, 0 makes perfect sense to use for this function, since that is
where the real-mode interrupt vectors are located, so you can't put an
I/O device there anyway (and still run DOS).
When designing a device, making a 0 BAR be disabled is probably a "safe"
thing to do, since there might be rogue-programmers out there that try
to accomplish partial configurations by doing this. The only downside
is the extra gates required to implement that functionality, which is,
admittedly, a very small cost today.
Also, you could implement a device-specific bit in config space above 0x40
that would control whether or not a 0 BAR should be considered valid or
invalid. And this bit could reset to a state such that a 0 BAR should be
considered invalid. And then, in your driver, if it determines that it
is running in an environment where a 0 BAR should be considered valid,
then you could enable that 0 BAR as a real address.
I have not seen the 2.2 spec. Does anyone who has knowledge about such
things know if this issue is clarified in that one?
> Thanks for the help
> Erin Hunter
>
> Erin_Hunter@SpectrumSignal.com
> Spectrum Signal Processing
> 100 - 8525 Baxter Place
> Burnaby, BC V5A 4V7
> (604) 421 - 5422
Sincerely,
-Richard Walter
rwalter@corp.auspex.com
Note: I speak for myself, not for Auspex.