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PCI add-in card: BIOS and driver questions
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: PCI add-in card: BIOS and driver questions
- From: Daniele Pinto <pinto@space.it>
- Date: Wed, 26 Aug 1998 17:38:58 +0200 (MET DST)
- Resent-Date: Thu, 27 Aug 1998 03:48:29 -0700
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-ID: <"fhWYr2.0.Ff.g-2vr"@electra.znyx.com>
- Resent-Sender: pci-sig-request@znyx.com
Hello!
I'm a student of electronic engineering and I'm working on my thesis.
I'm designing a PCI target: it'll work as an I/O device.
I've some questions.
1)
PCI spec 2.1 reports about expansion ROM BIOS on add-in card: I've a big
confusion.
Suppose that we have an x86 system and a PCI device (i.e. a video
card) with a BIOS ROM on board. When the POST is executed the
Configuration Manager checks for ROM address space request and maps
this space on shadow RAM (how does it?).
How does the Configuration Manager copies the ROM content on the shadow
RAM if it not know the phisical address on the card because the card is
not configured yet and we cannot address it?
Which are the instructions used for this task (i.e. first 'I/O read from
card' and then Memory write) ?
2)
Once the configuration menager configured this card only the BIOS know
the resource that our card have: how can we driver this device (i.e. if
we have not Plug and Play ISA device we can drive it by I/O instructions
on know addresses)?
3)
How can the operative system knows which PCI device asserted INT REQ if we
shared INT resources?
4)
Some Plug and Play devices (i.e. ISA Plug and Play audio card) are
configured as well as vendor specification (i.e. force to know I/O
address):
how does it possible if the configuration manager could place these
free resources anywhere?
Thanks in advance.
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Daniele Pinto
Member of IEEE Student Branch of Rome
Member of Linux User Group of Rome
e-mail: pinto@space.it
t076054@spv.ing.uniroma1.it
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