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pci bus latency



PCI Experts,
please help me with the following:
1. I'm trying to figure out whether 32x32 burst FIFO in my PCI Initiator 
add-on card is good enough for 60 Mbps operation.
In my system, I have one PCI Ethernet LAN, one ISA Graphics card (with 
low bus utilization) and one PCI Initiator Card.
My assumption is the PCI Bus latency is typically ~5usec. In other
words, you would get the PCI bus grant at least every 5 usec.
(The PCI implements bus latency timer where other PCI Master can't own
the bus for more than, say, 1 usec).

Please let me know if this is wrong.

2. If my Initiator card accesses the system memory via the PCI 
Host-Bridge chip and can do zero-wait state operation, what would be the 
wait state introduced by the target (in this case Host-Bridge chip)?

I really would appreciate your comments/inputs.

Thanks in advance.

jh

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