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RE: Capacitors on Power Pins
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: RE: Capacitors on Power Pins
- From: David Black <DavidB@anchorchips.com>
- Date: Tue, 8 Sep 1998 18:45:59 -0700
- Cc: "'David Black'" <davidb@anchorchips.com>
- Organization: Anchor Chips Incorporated
- Resent-Date: Wed, 9 Sep 1998 14:33:18 -0700
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-ID: <"aGJNy1.0.z_5.gtTzr"@electra.znyx.com>
- Resent-Sender: pci-sig-request@znyx.com
On Monday, September 07, 1998 10:45 PM, William Benner wrote, in part:
> ...
> I thought that I had read somewhere that each PCI plug in board must have
> capacitors on the power pins, even if these pins are not used by that
> particular board. ...
Page 153 of the PCI 2.1 spec mentions coupling requirements to ground, even
if they are not delivering power. Also, there is a line for documenting
this in the PCI Compliance Checklist which is in the public section of the
SIG's website at http://www.pcisig.com/docs.html
> Another question, while designing my "Universal" 3V/5V board, I believe that
> the so called VIO pins will go unused by my design because I am using a 3.3V
> PCI chip that is 5V tolerant. I believe that the Gods that put together PCI
> did not anticipate such "5V tolerant but 3.3V powered" devices when they
> created the spec. Can I simply leave these VIO pins unconnected, or must I
> connect them and use a capacitor?
Actually, the gods (or whoever was standing around at the time) did put a
footnote in on this subject. It is footnote 37 on page 153. From what I
understand of your design, you may use the 3.3V rail to power your chip's
I/O buffers. You don't need to use the VIO pins. However, the VIO pins,
used or unused, still need decoupling per the spec.
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David Black Anchor Chips Incorporated
davidb@anchorchips.com www.anchorchips.com
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Winner - Best of Comdex Spring '98 - New Technology
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