Re: pci extensions (was: *New* PCI bus standard?)

["Jeff DiNapoli" <jmd@audio2.engr.sgi.com>]

On Sep 10,  5:54pm, Alan Deikman wrote:
> Subject: Re: pci extensions (was: *New* PCI bus standard?)
>
> >From: Darrel Peterson <DPeterson@mapletreenetworks.com>
>

<snip>

>
> The silence on this list on this subject has been deafening.
> I can only conclude that either nobody here knows about it
> or those that do know about it have been instructed not to
> squeal.

It would have to be the latter.

>
> Well, I know there are plenty of readers here who could
> knowledgeably comment on the following questions:
>
>   1.  How feasible is 133MHz bus clocking/signalling
>       really with the current art of silicon?  Could
>       you really pump it through a connector or would
>       this be an on-board-only technology?

Notice how it's phrased '133MHz bus clocking/signalling', it
doesn't necessarily mean that you are running the pci_clk at
133Mhz. There are other schemes that would yield an effective
133Mhz 'data' transfer rate. One that comes to mind, would
be to clock data on 'both' edges of the 66Mhz clock or
add a second 66Mhz clock that is 180 degrees out of phase.
This could work within the current spec, by adding a
double-data-rate-reguest/ack set of pins, a bus master
could negotiate for a '133Mhz' burst transfer. Anyway, this
would be just one example.

>
>   2.  How would a gigabit serial bus compete with
>       64-bit, 33MHz PCI?   Convenience?  Cost?
>       USB and Firewire sure have been slow to take
>       off.

They have been slow to take off, but they will eventually
replace PCI as an expansion bus. They are, after-all the
ultimate in plug-n-play.


Jeff