PCI 2.1, Fig 4-5 and notes for Table 4-6

[Ruchi_Wadhawan@3com.com]

I have questions about the load circuit used to verify slew rates on a PCI
driver as specified in Figure 4-5 of the PCI 2.1 spec.
I also have questions about a similar load circuit suggested for Tval (max)
measurement in Table 4-6, Section 4.2.3.2.

These load circuits presumably imply a transmission line of length 1/2
inches. The parameters of the transmission line are not stated. One could
assume the characteristic impedence and trace velocity specified in 4.4.3.3
for purposes of modeling the transmission line. However, the placement of
the lumped elements (25 ohm resistor, 10pf capacitor, 1kohm resistor)
relative to the transmission line is ambiguous.
Any comments on this would be much appreciated.
Thank you.
Ruchi Wadhawan