I am forwarding this message as a request for help from anyone who can. Thanks Jim Freeman
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- To: todd.comins@intel.com, dave.mayhew@intel.com
- Subject: Message Signaled Interrupts
- From: Jim Freeman <jfreeman@PLXTech.com>
- Date: Fri, 02 Oct 1998 13:34:34 -0700
- CC: jfreeman@plxtech.com
- Sender: jfreeman
Hi, I have a copy of your presentation "MSI changes everything" given at the PC developers conference in May of this year. I have read the PCI 2.2 spec for the Vital Product Data that is initialized at runtime and the operation of MSI. The presentation outlines a write-write protocol for MSI. The way I understand it, the first write is for a DMA or other transaction being performed and the second write is to some MSI receiver in the system that starts the ISR for that devices particular message. The PCI spec also outlines the issues of presenting the same message while that message is also active and the possibility that the second message of the same type can be ignored. If this would be a problem for a device, the device driver is required to perform a handshake to the interrupt source to prevent a second message from being generated. At present, I see no mechanism for the acknowledge or a configuration register on the device that ccan be set to indicate to the system that the handshake is required. My second question is how does a device receive the interrupt acknowledge. Granted. this is not a problem for two different message types from the same device. Also, Your presentation references a presentation by Jill Hubbard on a PCI sig proposal for MSI. Do you have her email address or can I get a copy of the presentation from one of you. BTW, I do have the PCI 2.2 spec and have read every word about MSI. Thanks Jim Freeman PLX Technology
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