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RE: Altera Target Abort "undocumented feature" or "bug"?
- To: Mailing List Recipients <firstname.lastname@example.org>
- Subject: RE: Altera Target Abort "undocumented feature" or "bug"?
- From: Ali Najafi - Azfin <email@example.com>
- Date: Mon, 2 Nov 1998 19:13:16 +0800
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- Resent-Date: Mon, 2 Nov 1998 23:10:47 -0800
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> It depends on whether the target device is aborting a transaction similar
> to the one that caused the target abort to occur, or whether it does this
> even for valid (by valid i mean non-abortable) transactions. If the former
> is the case, there is no problem with the core, otherwise, I believe it is
> more like a bug than a feature, documented or otherwise (or maybe a bug in
> the features, if the designers of the core have designed it specifically
> to behave this way).
> No matter the device has encountered an abort condition, if the device
> receives a *valid* target transaction, a non-abortable one which has no
> connection with the previous aborted one, the device has to respond
> without any concern to the previous abort condition. This is specially
> true for devices which implement different independent functionalities.
> Say for instance, if it implements two independent functionalities A and B
> under the same configuration space, and functionality A aborts a
> transaction, and later, the device driver wants to communicate with
> functionality B by a non-abortable transaction, the device should respond
> My $0.02, and my understanding from PCI spec
> What to make of this?
> Well everyone is in agreement that a TARGET ABORT is a bad thing and
> 'should' never
> happen. Here's where oppinions differ: I believe that even though a
> TARGET ABORT has happened (for whatever reason) and that data 'may' have
> lost or corrupted, the PCI core should continue to function normally
> (regardless of the
> state of the TARGET ABORT bit in the configuration register). It should
> be up to the
> individual application to decide to somehow recover or ignore the TARGET
> Altera, on the other hand, believes it is OK for their PCI core to stop
> normally until the TARGET ABORT is cleared.
> So, what are your thoughts? Is this an issue in any other chip-sets or
> pci cores?