RE: Trace length for Interrupt lines

[Brooks Lame <Brooks_Lame@mcg.mot.com>]

> I am looking for the rule that governs the trace length for the 
> PCI interrupt signals. Page 154 Section 4.4.3.1 excludes them from
> the 1.5" rule. Is there a max length for these signal?
> 
> If my PCI master is behind a PCI bridge, do I need to put a buffer in
> the interrupt line just to keep the trace from my buffer to 
> the connector
> short?

	This was/is one of my concerns too.  Unfortunately, the PCI Spec
doesn't say anything other than that PCI interrupts are shareable.  You
don't really need a max length rule to meet a max skew requirement, but
a buffer rule might be useful.  There are some designers and customers
out there that are unwittingly building some significant interrupt
'trees' with the use of multiple and cascading bridges.  Message based
interrupts won't have this problem of course, but it's not a solution
unless you kill the legacy method.  I think something should be added to
the PCI Spec before some support nightmare(s) come to light down the
road.

> Regards,
> ----------------------
> Tai Phan                        Interphase Corporation
> phan@iphase.com
--
Brooks Lame'
Design Engineer,  Motorola Monterey Design Center
brooks_lame@mcg.mot.com,  blame@prolog.com
Standard Disclaimer: Editorial viewpoints are not necessarily those of
my employer.