RE: querries on PCI

[Ali Najafi - Azfin <alinajafi@hqexchg.aztech.com.sg>]

> 1. We are designing a PCI add on board and is being targetted
> for 25MHz (33MHz was not achievable due to some reasons), 32 bit.
> The user manual for the PC says by changing Dip switch settings,
> 25MHz can be set. If I do so, can I get the PCI clock 25MHz practically?
> We are using the Acer make model 920 V55LA.
> 
This totally depends on the motherboard. If it is capable of doing it, it
will do it, otherwise, it won't. If the referece manual says that it is
possible to do so, it should be. Give it a try and observe the PCI clock on
an osciloscope, logic analyzer, or some other suitable equipment.

> We have got another model from Acer, Acerpower 3200T. Can this be
> suited for that?
> 
Consult its reference manual. 

> 2. What is meant by burst mode in PCI? How many data phases it does
> contain? and
> max?
> 
If in one transaction, the master of the bus performs more than one data
phase, the transaction is called  a burst. The number of data phases in a
burst depends on the master and whether how many it wishes to transfer.
However, one point to remember is that if the bus signal GNT# is deasserted,
the master should not continue with the burst and should release the bus
ASAP, while it still drives the bus signals according to the bus protocol
defined in the spec. Because of this, even if you know for sure that your
device wants to perform bursts of length n all the time, since the bus
arbiter may deassert GNT# at any time, there is no guarantee that your
device will practically perform the n data phases.

> 3. How to deny the power to the unused CLBs in an FPGA of Xilinx?
> 
Is it possible? Please let this mailing list know if you found out.

One point which is not directly related to your questions is that due to
timing issues, performing bursts using FPGA's may be a bit tricky and hard
to achieve. I have been able to achieve bursts on Xilinx 4025e, however,
only at the speed of 27 MHz. If I remove the burst capability, it can
achieve 33 MHz, and still be able to perform bus mastering.

My $0.02
A. Najafi


> Hoping to hear from someone ASAP.
> 
> Thanks in advance
> 
> Botlaguduru. S
> 11th Nov 1998
> 
> 
> 
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