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PCI Addressing Conventions
- To: Mailing List Recipients <firstname.lastname@example.org>
- Subject: PCI Addressing Conventions
- From: Steve Stolper <email@example.com>
- Date: Wed, 18 Nov 1998 14:57:03 -0800
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- Resent-Date: Thu, 19 Nov 1998 10:50:38 -0800
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I am new to working with PCI and have a question concerning existing
adressing conventions (if any).
We have a board which resides in the PCI back-plane of a personal
computer. The board contains a microprocessor (i960) which has two
modes of addressing memory across the PCI bus.
The first is a "direct addressing" method which asserts the same
address on the PCI bus that was issued on the local bus. The second is
an "addressing window" method which uses a register to translate the
address before placing it on the PCI bus.
We are currently employing the direct addressing method to access
memory on the PC host across the PCI bus. We have not experienced any
problems but wonder if we have just been lucky. The direct addressing
method only allows access to PCI addresses in a 2 gigabyte window. The
PC has always placed its memory within this window on the PCI bus.
Is it a convention that a PCI bus master (the PC) places its own memory
into the lower 2 gigabytes or have we simply been lucky?
We had assumed that the (i960) direct addressing mode would allow us to
be consistent with the PCI bus standard. Is this a faulty assumption on
Do we have to utilize the "addressing window" approach to be consistent
with the PCI bus standard?
Thank you very much for your assistance.