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RE: Self-mastering?
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: RE: Self-mastering?
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- Date: Thu, 8 Apr 1999 11:55:08 -0400
- Delivered-To: pcisig@teleport.COM
- Resent-Date: Thu, 8 Apr 1999 10:00:57 -0700
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-ID: <"ElP-a.0.We1.l5D3t"@electra.znyx.com>
- Resent-Sender: pci-sig-request@znyx.com
The PCI Spec, revision 2.2, does indeed prohibit a device from both
driving and receiving signals from the bus at the same time.
The restriction is at the very end of chapter 3, on page 112:
> 9. Devices cannot drive and receive signals at the same time
... followed by two explanatory paragraphs.
Although the reason given is electrical (timing), it is in the chapter
on bus protocol. As stated, it is not optional, even if the system bus
were designed so that the timing could work.
If a device were to master to itself, it must be smart enough to monitor
the signals being driven BEFORE they go through the output buffers. The
driven signals would be received by nobody and just waste bus bandwidth.
Regards,
Andy Ingraham