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Re: Compact PCI Signals

	-----Original Message-----
	From:	Richard Walter [SMTP:rwalter@corp.auspex.com]
	Sent:	Friday, May 14, 1999 4:38 PM
	To:	Mailing List Recipients
	Subject:	Re: Compact PCI Signals

	> Hello;
	> I have rev-2.1 of the Compact PCI spec.
	> Can anyone tell me what the following signals are:
	> 	TRST#
	> 	TDO
	> 	TDI
	> 	TCK
	> 	TMS

	These are JTAG test signals and are completely specified in IEEE

	[CJ]  The signals are:  

	TRST#   = Test Logic Reset
	TDO     =  Test Data Out 
	TDI      =   Test Data In
	TCK    =   Test  Clock
	TMS   =    Test Mode Select.

	As Richard points out, they are described in the IEEE 1149.1
standard.  If you don't
	want to buy the standard, you can get a quick overview (3-4
pages) of what the
	standard does by going to TI's web site
	[CJ]  While most people think of 1149.1 for boundary-scan
interconnect tests it
	is also the method for hardware verification, silicon-debug,
in-system programming
	of CPLD's/FPGA's and emulation.
	They are optional for PCI cards.  However, if your card does not
use JTAG
	then the PCI spec requires that you connect TDI to TDO.

	[CJ]  While Richard is right, the spec says this, it is
fundamentally flawed.
	Shorting TDI to TDO on your daughter card prevents multi-drop
	system architectures from working (TDI and TDO cannot be tied
	Shorting them together does nothing, as a 'daisy chain' 1149.1 
	architecture won't work in a system design (Motherboards with
empty slots
	break the chain). My recommendation is to not do anything with
TDI and TDO if you're 
	daughter card doesn't use 1149.1.  (Why not consider it?  It's
an extremely low
	cost way to test your daughter card. Interface designs made with
	FPGA's from Xilinx/Altera all support 1149.1)
	[CJ]  I've mentioned this TDI/TDO spec problem before on the
reflector, in the
	past it has fallen on deaf ears.  
	If you're developing a PCI slot and don't intend to use JTAG,
then you
	ought to leave TDO unconnected and put pull-ups on the others to
	them valid when a card is plugged in.  (ok, you might want a
	on TRST# to keep the JTAG port in reset, but if TCK never
toggles, then
	TRST# shouldn't matter.)
	[CJ]  I'm not in complete agreement here.  If you have a slot,
	1149.1 should be connected to allow the debug/FPGA
	to occur at the system level.  If you're not allowing system
level 1149.1
	then I think the pull-ups on TMS, TDI and TCK are overkill
(1149.1 spec
	requires devices to have internal pull-ups, so any daughter card
	with 1149.1 would be pulled-up.)  TRST# should be pulled down at
	the board level, just not sure whether this should be done at
	daughter card level or motherboard.  I see advantages to both. 

	CJ Clark
	Chair, IEEE 1149.1

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